CS+ Device Information for RL78

The product name of CubeSuite+, an integrated development environment from Renesas, 
has been changed to "CS+" from V3.00.00, which was released on October 1, 2014.

Changes from CS+ for CC V8.11.01 to V8.12.00 (Jul. 22, 2024)

1. Modification of Device Information
- RL78/F23 group
  [Target devices]
    R7F123FBG3xNP, R7F123FBG4xNP, R7F123FBG5xNP, 
    R7F123FGG3xFB, R7F123FGG4xFB, R7F123FGG5xFB, 
    R7F123FLG3xFB, R7F123FLG4xFB, R7F123FLG5xFB, 
    R7F123FMG3xFB, R7F123FMG4xFB, R7F123FMG5xFB
  [Contents]
    The default value of Security Option Byte has been changed.
      Address:000C4h　FFh -> FEh

- RL78/F24 group
  [Target devices]
    R7F124FBJ3xNP, R7F124FBJ4xNP, R7F124FBJ5xNP, 
    R7F124FGJ3xFB, R7F124FGJ4xFB, R7F124FGJ5xFB, 
    R7F124FLJ3xFB, R7F124FLJ4xFB, R7F124FLJ5xFB, 
    R7F124FMJ3xFB, R7F124FMJ4xFB, R7F124FMJ5xFB, 
    R7F124FPJ3xFB, R7F124FPJ4xFB, R7F124FPJ5xFB
  [Contents]
    The default value of Security Option Byte has been changed.
      Address:000C4h　FFh -> FEh

Changes from CS+ for CC V8.11.00 to V8.11.01 (Apr. 22, 2024)

1. Modification of Device Information
- RL78/G15 group
  [Target devices]
    R5F12007xNS, R5F12008xNS
  [Contents]
    The following interrupt information have been deleted.
      INTP6 (Address:0020h)
      INTP7 (Address:0022h)

  [Target devices]
    R5F12007xNS, R5F12008xNS, R5F12017xSP, R5F12018xSP,
    R5F12047xNA, R5F12047xSP, R5F12048xNA, R5F12048xSP
  [Contents]
    The following interrupt information have been deleted.
      INTCMP1 (Address:0038h)

  [Target devices]
    R5F12007xNS, R5F12008xNS, R5F12017xSP, R5F12018xSP,
    R5F12047xNA, R5F12047xSP, R5F12048xNA, R5F12048xSP,
    R5F12067xSP, R5F12068xSP
  [Contents]
    Modification of debug monitor information which is used by debugger.

- RL78/G16 group
  [Target devices]
    R5F1211AxSP, R5F1211CxSP
  [Contents]
    The following register have been deleted.
      HIOSTOP (Address:FFFA1h)
      MSTOP (Address:FFFA1h)
      MCM0 (Address:FFFA4h)
      MCS (Address:FFFA4h)

  [Target devices]
    R5F1211AxSP, R5F1211CxSP, R5F1214AxNA, R5F1214AxSP,
    R5F1214CxNA, R5F1214CxSP, R5F1216AxSP, R5F1216CxSP,
    R5F1217AxNA, R5F1217CxNA, R5F121BAxFP, R5F121BAxNA,
    R5F121BCxFP, R5F121BCxNA
  [Contents]
    Modification of debug monitor information which is used by debugger.

- RL78/G23 group
  [Contents]
    The CTSU register information have been updated.

- RL78/FGIC
  [Target devices]
    RAJ240071, RAJ240045, RAJ240055, RAJ240075,
    RAJ240310, RAJ240047, RAJ240057, RAJ240090,
    RAJ240100
  [Contents]
    The memory information used by the build tool has been updated.


2. Supported Devices Increased
- RL78/G15 group
  [Target devices]
    R5F12008xSN

- RL78/G23 group
  [Target devices]
    R7F100GPGxFA, R7F100GPHxFA, R7F100GPJxFA, R7F100GPKxFA,
    R7F100GPLxFA, R7F100GPNxFA

Changes from CS+ for CA,CX V8.10.02 to V8.11.01 (Apr. 22, 2024)

1. Modification of Device Information
- RL78/FGIC
  [Target devices]
    RAJ240071, RAJ240045, RAJ240055, RAJ240075,
    RAJ240310, RAJ240047, RAJ240057, RAJ240090,
    RAJ240100
  [Contents]
    The memory information used by the build tool has been updated.

Changes from CS+ for CC V8.10.02 to V8.11.00 (Jan. 22, 2024)

1. Modification of Device Information
- RL78/G22 group
  [Contents]
    I/O header file for the C language and the register information displayed in SFR panel have been updated.

- RL78/G24 group
  [Contents]
    I/O header file for the C language and the register information displayed in SFR panel have been updated.

Changes from CS+ for CC V8.10.00 to V8.10.02 (Oct. 20, 2023)

1. Modification of Device Information
- RL78/I1C group
  [Target devices]
    R5F10NPL, R5F10NPLD, R5F10NML, R5F10NMLD
  [Contents]
    I/O header file for the C language and the register information displayed in SFR panel have been updated.

Changes from CS+ for CA,CX V8.09.01 to V8.10.02 (Oct. 20, 2023)

1. Modification of Device Information
- RL78/I1C group
  [Target devices]
    R5F10NPL, R5F10NPLD, R5F10NML, R5F10NMLD
  [Contents]
    I/O header file for the C language and the register information displayed in SFR panel have been updated.

Changes from CS+ for CC V8.09.01 to V8.10.00 (Jul. 20, 2023)

1. Modification of Device Information
- RL78/G16 group
  [Contents]
    I/O header file for the C language and the register information displayed in SFR panel have been updated.

- RL78/G22 group
  [Contents]
    I/O header file for the C language and the register information displayed in SFR panel have been updated.

Changes from CS+ for CC V8.09.00 to V8.09.01 (Apr. 20, 2023)

1. Modification of Device Information
- RL78/FGIC
  [Contents]
    The device name has been corrected.
	 Before correction: RAA240123
	 After correction: RAJ240057

2. Supported Devices Increased
- RL78/G16 group
  [Target devices]
    R5F1211AxSP, R5F1211CxSP, R5F1214AxNA, R5F1214AxSP,
    R5F1214CxNA, R5F1214CxSP, R5F1216AxSP, R5F1216CxSP,
    R5F1217AxNA, R5F1217CxNA, R5F121BAxFP, R5F121BAxNA,
    R5F121BCxFP, R5F121BCxNA

- RL78/G24 group
  [Target devices]
    R7F101G6ExSP, R7F101G6GxSP, R7F101G7ExNP, R7F101G7GxNP, 
    R7F101G8ExLA, R7F101G8GxLA, R7F101GAExSP, R7F101GAGxSP, 
    R7F101GBExFP, R7F101GBExNP, R7F101GBGxFP, R7F101GBGxNP, 
    R7F101GEExNP, R7F101GEGxNP, R7F101GFExFP, R7F101GFGxFP, 
    R7F101GGExFB, R7F101GGExNP, R7F101GGGxFB, R7F101GGGxNP, 
    R7F101GJExFA, R7F101GJGxFA, R7F101GLExFA, R7F101GLExFB, 
    R7F101GLGxFA, R7F101GLGxFB

Changes from CS+ for CA,CX V8.08.00 to V8.09.01 (Apr. 20, 2023)

1. Modification of Device Information
- RL78/FGIC
  [Contents]
    The device name has been corrected.
	 Before correction: RAA240123
	 After correction: RAJ240057

Changes from CS+ for CC V8.08.00 to V8.09.00 (Jan. 20, 2023)

1. Supported Devices Increased
- RL78/F24 group
  [Target devices]
    R7F123FBG3xNP, R7F123FBG4xNP, R7F123FBG5xNP, 
    R7F123FGG3xFB, R7F123FGG4xFB, R7F123FGG5xFB, 
    R7F123FLG3xFB, R7F123FLG4xFB, R7F123FLG5xFB, 
    R7F123FMG3xFB, R7F123FMG4xFB, R7F123FMG5xFB

2. Modification of Device Information
- RL78/F24 group
  [Contents]
    Modification of debug monitor information which is used by debugger.

Changes from CS+ for CC V8.07.01 to V8.08.00 (Oct. 20, 2022)

1. Supported Devices Increased
- RL78/FGIC
  [Target devices]
    RAJ240055, RAA240123, RAJ240310

- RL78/G15
  [Target devices]
    R5F12007xNS, R5F12008xNS, R5F12017xSP, R5F12018xSP,
    R5F12047xNA, R5F12047xSP, R5F12048xNA, R5F12048xSP,
    R5F12067xSP, R5F12068xSP

2. Modification of Device Information
- RL78/F24 group
  [Contents]
    I/O header file for the C language and the register information displayed in SFR panel have been updated.

Changes from CS+ for CA,CX V8.07.00 to V8.08.00 (Oct. 20, 2022)

1. Supported Devices Increased
- RL78/FGIC
  [Target devices]
    RAJ240055, RAA240123, RAJ240310

Changes from CS+ for CC V8.07.00 to V8.07.01 (Apr. 20, 2022)

1. Modification of Device Information
- RL78/F24 group
  [Contents]
    I/O header file for the C language and the register information displayed in SFR panel have been updated.
    The RAM information used by the build tool has been updated.

Changes from CS+ for CC V8.06.00 to V8.07.00 (Jan. 20, 2022)

1. Supported Devices Increased
- RL78/F24 group
  [Target devices]
    R7F124FBJ3xNP, R7F124FBJ4xNP, R7F124FBJ5xNP,
    R7F124FGJ3xFB, R7F124FGJ4xFB, R7F124FGJ5xFB,
    R7F124FLJ3xFB, R7F124FLJ4xFB, R7F124FLJ5xFB,
    R7F124FMJ3xFB, R7F124FMJ4xFB, R7F124FMJ5xFB,
    R7F124FPJ3xFB, R7F124FPJ4xFB, R7F124FPJ5xFB

2. Modification of Device Information
- RL78/G23 group
  [Contents]
    I/O header file for the C language and the register information displayed in SFR panel have been updated.
	
- RL78/FGIC
  [Contents]
    The device name displayed in the I/O header file for C language has been updated.

Changes from CS+ for CA,CX V8.05.00 to V8.07.00 (Jan. 20, 2022)

1. Modification of Device Information
- RL78/FGIC
  [Contents]
    The device name displayed in the I/O header file for C language has been updated.

Changes from V8.05.01 to V8.06.00 (Jul. 20, 2021)

1. Supported Devices Increased
- RL78/G23 group
  [Target devices]
    R7F100GAFxSP, R7F100GAGxSP, R7F100GAHxSP, R7F100GAJxSP, R7F100GBFxNP,
    R7F100GBFxFP, R7F100GBGxFP, R7F100GBGxNP, R7F100GBHxNP, R7F100GBHxFP,
    R7F100GBJxNP, R7F100GBJxFP, R7F100GCFxLA, R7F100GCGxLA, R7F100GCHxLA,
    R7F100GCJxLA, R7F100GEFxNP, R7F100GEGxNP, R7F100GEHxNP, R7F100GEJxNP,
    R7F100GFFxFP, R7F100GFGxFP, R7F100GFHxFP, R7F100GFJxFP, R7F100GFKxFP,
    R7F100GFLxFP, R7F100GFNxFP, R7F100GGFxFB, R7F100GGFxNP, R7F100GGGxFB,
    R7F100GGGxNP, R7F100GGHxFB, R7F100GGHxNP, R7F100GGJxFB, R7F100GGJxNP,
    R7F100GGKxFB, R7F100GGKxNP, R7F100GGLxFB, R7F100GGLxNP, R7F100GGNxFB,
    R7F100GGNxNP, R7F100GJFxFA, R7F100GJGxFA, R7F100GJHxFA, R7F100GJJxFA,
    R7F100GJKxFA, R7F100GJLxFA, R7F100GJNxFA, R7F100GLHxFA, R7F100GLHxFB,
    R7F100GLHxLA, R7F100GLJxFA, R7F100GLJxFB, R7F100GLJxLA, R7F100GLKxFA,
    R7F100GLKxFB, R7F100GLKxLA, R7F100GLLxFA, R7F100GLLxFB, R7F100GLLxLA,
    R7F100GLNxFA, R7F100GLNxFB, R7F100GLNxLA, R7F100GMGxFA, R7F100GMGxFB,
    R7F100GMHxFA, R7F100GMHxFB, R7F100GMJxFA, R7F100GMJxFB, R7F100GMKxFA,
    R7F100GMKxFB, R7F100GMLxFA, R7F100GMLxFB, R7F100GMNxFA, R7F100GMNxFB,
    R7F100GPGxFB, R7F100GPHxFB, R7F100GPJxFB, R7F100GPKxFB, R7F100GPLxFB,
    R7F100GPNxFB, R7F100GSJxFB, R7F100GSKxFB, R7F100GSLxFB, R7F100GSNxFB

Changes from V8.05.00 to V8.05.01 (Apr. 13, 2021)

1. Supported Devices Increased
- RL78/G23 group
  [Target devices]
    R7F100GLFxFA, R7F100GLFxFB, R7F100GLFxLA,
    R7F100GLGxFA, R7F100GLGxFB, R7F100GLGxLA

Changes from V8.04.00 to V8.05.00 (Jan. 20, 2021)

1. Supported Devices Increased
- RL78/I1C group
  [Target devices]
    R5F10NPL, R5F10NPLD, R5F10NML, R5F10NMLD

Changes from V8.03.00 to V8.04.00 (Jul. 20, 2020)

1. Supported Devices Increased
- RL78/G1M group
  [Target devices]
    R5F11W67, R5F11W68

- RL78/G1N group
  [Target devices]
    R5F11Y67, R5F11Y68

Changes from V8.02.01 to V8.03.00 (Jan. 20, 2020)

1. Supported Devices Increased
- RL78/G13A group
  [Target devices]
    R5F140FK, R5F140FL, R5F140GK, R5F140GL,
    R5F140LK, R5F140LL, R5F140PK, R5F140PL

- RL78/G1P group
  [Target devices]
    R5F11Z7A, R5F11ZBA

- RL78/I1C group
  [Target devices]
    R5F11TLE, R5F11TLG

Changes from V8.02.00 to V8.02.01 (Oct. 8, 2019)

1. Supported Devices Increased
- RL78/F1E group
  [Target devices]
    R5F11KLF, R5F11KLG, R5F11LLE, R5F11LLF

2. Modification of Device Information
- RL78/F1E group
  [Target devices]
    R5F11KLE, R5F11LLG

  [Contents]
    The following interrupt have been added.
          INTIIC11 (Address:0040h)

Changes from V8.01.00 to V8.02.00 (Jul. 22, 2019)

1. Deletion for the following devices
- RL78/FGIC
  [Target devices]
    RAJ240073

Changes from V7.00.00 to V8.01.00 (Jan. 21, 2019)

1. Supported Devices Increased
- RL78/FGIC
  [Target devices]
    RAJ240045, RAJ240047, RAJ240071, RAJ240073,
    RAJ240075, RAJ240080, RAJ240090, RAJ240100

2. Startup routines modified
    Initialization processing of stack area has been added.

Changes from V6.01.00 to V7.00.00 (Jul. 20, 2018)

1. Supported Devices Increased
- RL78/F1E group
  [Target devices]
    R5F11KLE, R5F11LLG

2. Modification of Device Information
- RL78/G11 group
  [Target devices]
    Refer to Table 1
  [Contents]
    (1)The following register have been deleted.
          POM2 (Address:F0052h)
    (2)The following register have been deleted.
          POM4 (Address:F0054h)
    (3)The following register have been deleted.
          PIM4 (Address:F0044h)
    (4)The following register have been deleted.
          PIM5(Address:F0045h)
    (5)The following register have been deleted.
          IICA0 (Address:FFF50h)
          SVA0 (Address:F0234h)
          IICCTL00 (Address: F0230h)
          IICS0 (Address: FFF51h)
          IICF0 (Address: FFF52h)
          IICCTL01 (Address: F0231h)
          IICWL0 (Address: F0232h)
          IICWH0 (Address: F0233h)
          IICA0EN (Address:F00F0h Bit4)
          IICA0RES (Address:F00F1h Bit4)
Table1 Target devices and contents
Target devices
contents
Pin
(1)
(2)
(3)
(4)
(5)
R5F1051A
10
R5F1054A
16
R5F1056A
20
R5F1057A
24
R5F1058A
25
:Target device 

- RL78/G14 group
  [Target devices]
    Refer to Table 2
  [Contents]
    (1)The following register have been deleted.
          SSIE00 (Address:F0073h Bit7)
          TEMPCAL0 (Address:F00ACh)
          TEMPCAL1 (Address:F00ADh)
          TEMPCAL2 (Address:F00AEh)
          TEMPCAL3 (Address:F00AFh)
          RMC (Address:F00F4h)
          WDVOL (Address:F00F4h Bit7)
          TRGGRCM (Address:F025Ch)
          TRGGRDM (Address:F025Eh)
          TRDGRC0M (Address:F027Ch)
          TRDGRC1M (Address:F028Ch)
          TRDGRD0M (Address:F027Eh)
          TRDGRD1M (Address:F028Eh)
          SDIV (Address:FFFA4h Bit3）
          SROIF (Address:FFFE0h Bit0)
          SROMK (Address:FFFE4h Bit0)
          SROPR0 (Address:FFFE8h Bit0)
          SROPR1 (Address:FFFECh Bit0)
    (2)The following register have been deleted.
          SIO10 (Address:FFF44h)
    (3)The following register have been deleted.
          SIO01 (Address:FFF12h) 
    (4)The following register have been deleted.
          XTSTOP (Address:FFFA1h Bit6）
          CSS (Address:FFFA4h Bit6）
          CLS (Address:FFFA4h Bit7）
    (5)The following register have been deleted.
          SIO21 (Address:FFF4Ah)
    (6)The following interrupt have been deleted.
          INTSRO (Address:0004h）
    (7)The following register have been added.
          ELSELR24 (Address:F0318h)
          ELSELR25 (Address:F0319h)
    (8)The following register have been deleted.
          ELSELR06 (Address:F0306h) 
    (9)The following register have been deleted.
          ELSELR20 (Address:F0314h)
          ELSELR21 (Address:F0315h)
          ELSELR22 (Address:F0316h)
          ELSELR23 (Address:F0317h)
Table2 Target devices and contents
Target devices
contents
Pin
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
R5F104Ax
Note 4
30
R5F104Bx
Note 4
32
R5F104Cx
Note 4
36
R5F104Ex
Note 5
40
R5F104Fx
Note 6
44
R5F104Gx
Note 1
Note 6
48
R5F104Jx
Note 2
Note 5
52
R5F104Lx
Note 3
Note 6
64
R5F104Mx
80
R5F104Px
100
:Target device
Notes 1.Products with Code Flash Memory Size of 384 KB and 512KB ONLY
Notes 2. Products with Code Flash Memory Size of 256KB ONLY
Notes 3. Products with Code Flash Memory Size of 96KB and 512KB ONLY
Notes 4. Products with Code Flash Memory Size of 96 KB and 128KB ONLY
Notes 5. Products with Code Flash Memory Size of 96 KB and 128KB and 192KB ONLY
Notes 6. Products with Code Flash Memory Size of 96 KB, 128KB, 192KB and 256KB ONLY

Changes from V6.00.00 to V6.01.00 (Jan. 22, 2018)

1. Supported Devices Increased
- RL78/G11 group
  [Target devices]
    R5F1051A, R5F1054A

2. Modification of SFR Information
- RL78/I1C group
  [Target devices]
    R5F10NLE, R5F10NLG, R5F10NME, R5F10NMG
    R5F10NMJ, R5F10NPG, R5F10NPJ
  [Contents]
    (1) The following register have been added.
          MULBL (Address: FFF3Ch)
          MULBH (Address: FFF3Eh) 
          MUL32UL (Address: F0280h)
          MUL32UH (Address: F0282h) 
          MUL32SL (Address: F0284h) 
          MUL32SH (Address: F0286h) 
          MAC32UL (Address: F0288h) 
          MAC32UH (Address: F028Ah) 
          MAC32SL (Address: F028Ch) 
          MAC32SH (Address: F028Eh) 
          MULR0 (Address: F0290h) 
          MULR1 (Address: F0292h) 
          MULR2 (Address: F0294h) 
          MULR3 (Address: F0296h) 
          MULC (Address: F029Ah)

    (2) The following BIT register have been added.
          MULST (Address: F029Ah Bit0) 
          MACSF (Address: F029Ah Bit1) 
          MACOF (Address: F029Ah Bit2)
          MULFRAC (Address: F029Ah Bit4)
          MULSM (Address: F029Ah Bit6) 
          MACMODE (Address: F029Ah Bit7)

- RL78/G1D group
  [Target devices]
    R5F11AGG, R5F11AGH, R5F11AGJ
  [Contents]
    (1) The following attribute of register have been changed from Read only to Read/Write. 
          P2 (Address:  FFF02h Bit7,6,5,4) 
          P4 (Address: FFF04h Bit7,6,5,4)
          P5 (Address: FFF05h Bit7,6)
          P6 (Address: FFF06h Bit5,4,3,2) 
          P14 (Address: FFF0Eh Bit7,6,5,4)
          PM2 (Address: FFF22h Bit7,6,5,4)
          PM4 (Address: FFF24h Bit7,6,5,4)
          PM5 (Address: FFF25h Bit7,6)
          PM6 (Address: FFF26h Bit7,6,5,4)
          PM14 (Address: FFF2Bh Bit5,4,3,2)

    (2) The following register have been added.
          P8 (Address: FFF08h)
          P10 (Address: FFF0Ah) 
          P11 (Address: FFF0Bh) 
          P15 (Address: FFF0Fh) 
          PM8 (Address: FFF28h)
          PM10 (Address: FFF2Ah)
          PM11 (Address: FFF2Bh)
          PM15 (Address: FFF2Fh) 

    (3) The following register have been deleted.
          KRM (Address: FFF37h)
          MULA (Address: FFFF0h)
          MULB (Address: FFFF2h)
          MUL0H (Address: FFFh4)
          MUL0L (Address: FFFF6h)
          TEMPCAL0 (Address: F00ACh)
          TEMPCAL1 (Address: F00ADh)
          TEMPCAL2 (Address: F00AEh)
          TEMPCAL3 (Address: F00AFh)
          RMC (Address: F00F4h)

    (4) The following BIT register have been deleted.
          WDVOL (Address: F00F4h Bit7)

    (5) The register name have been changed.
          Before change: FRA2H
          After change: DRA2H

Changes from V5.00.00 to V6.00.00 (Jul. 20, 2017)

1. Modification of SFR Information
- RL78/G11 group
  [Target devices]
    R5F1056A, R5F1057A, R5F1058A
  [Contents]
    The following BIT register have been added.
          TKBRDT0 (Address: F0412h Bit0)

- RL78/L1C group
  [Target devices]
    R5F110ME, R5F110MF, R5F110MG, R5F110MH
    R5F110MJ, R5F110PE, R5F110PF, R5F110PG
    R5F110PH, R5F110PJ, R5F111ME, R5F111MF
    R5F111MG, R5F111MH, R5F111MJ, R5F111PE
    R5F111PF, R5F111PG, R5F111PH, R5F111PJ
    R5F110NE, R5F111NE, R5F110NF, R5F111NF
    R5F110NG, R5F111NG, R5F110NH, R5F111NH
    R5F110NJ, R5F111NJ
  [Contents]
    (1)The following register have been deleted.
          GAIDIS (Address: F007Ch)

    (2)The following BIT register have been deleted.
          TKBPAHTS10 (Address: F0274h Bit0)
          TKBPAHTS20 (Address: F02B4h Bit0)
          TKBPAHTS00 (Address: F0534h Bit0)
          TKBPAHTS11 (Address: F0274h Bit1)
          TKBPAHTS21 (Address: F02B4h Bit1)
          TKBPAHTS01 (Address: F0534h Bit1)
          TKBPAHTT10 (Address: F0275h Bit0)
          TKBPAHTT20 (Address: F02B5h Bit0)
          TKBPAHTT00 (Address: F0535h Bit0)
          TKBPAHTT11 (Address: F0275h Bit1)
          TKBPAHTT21 (Address: F02B5h Bit1)
          TKBPAHTT01 (Address: F0535h Bit1)
          SDIV (Address: FFFA4h Bit3)

- RL78/L1A group
  [Target devices]
    R5F11MMD, R5F11MME, R5F11MMF, R5F11MPE
    R5F11MPF, R5F11MPG
  [Contents]
    The following register have been deleted.
          GAIDIS (Address: F007Ch)

Changes from V4.00.02 to V5.00.00 (Jan. 20, 2017)

1. Modification of SFR Information
- RL78/G10 group
  [Target devices]
    R5F10Y44ASP, R5F10Y46ASP, R5F10Y47ASP
  [Contents]
    The following registers can now be accessed by a bit.
          EGP0 (Address:FFF38h)
          EGN0 (Address:FFF39h)
          COMPFIR (Address:FFF61h) 

  [Target devices]
    R5F10Y14ASP, R5F10Y16ASP, R5F10Y17ASP
    R5F10Y44ASP, R5F10Y46ASP, R5F10Y47ASP
  [Contents]
    The BRK interrupt is now available.

Changes from V4.00.00 to V4.00.02 (Oct. 5, 2016)

1. Supported Devices Increased
- RL78/L1A group
  [Target devices]
    R5F11MPG, R5F11MPF, R5F11MPE, R5F11MMF, R5F11MME, R5F11MMD

- RL78/G11 group
  [Target devices]
    R5F1058A, R5F1057A, R5F1056AD

2. Modification of Debug Information
- RL78/G1F group
  [Contents]
    Modification of device identification information and Flash rewriting possible voltage information which is used by debugger.

Changes from V3.00.05 to V4.00.00 (Apr. 20, 2016)

1. Addition of Pin Configuration Information
- RL78/F15 group

Changes from V3.00.04 to V3.00.05 (Jan. 20, 2016)

1. Supported Devices Increased
- RL78/G1H group
  [Target devices]
    R5F11FLL, R5F11FLK, R5F11FLJ

2. Modification of SFR Information
- RL78/G1C group
  [Target devices]
    R5F10JBC, R5F10KBC, R5F10JGC, R5F10KGC
  [Contents]
    The following BIT register have been added: 
          DSCON (Address:F02E5h Bit0)
          DSCM (Address:F02E5h Bit1)
          DSFRDIV (Address:F02E5h Bit2)
          CKSELR (Address:F02E6h Bit0)
          RDIV0 (Address:F02E6h Bit1)
          RDIV1 (Address:F02E6h Bit2)

- RL78/L1C group
  [Target devices]
    R5F110ME, R5F110MF, R5F110MG, R5F110MH,
    R5F110MJ, R5F110PE, R5F110PF, R5F110PG,
    R5F110PH, R5F110PJ, R5F110NE, R5F110NF,
    R5F110NG, R5F110NH, R5F110NJ
  [Contents]
    The following BIT register have been added: 
          DSCON (Address:F02E5h Bit0)
          DSCM (Address:F02E5h Bit1)
          DSFRDIV (Address:F02E5h Bit2)
          CKSELR (Address:F02E6h Bit0)
          RDIV0 (Address:F02E6h Bit1)
          RDIV1 (Address:F02E6h Bit2)

- RL78/G10 group
  [Target devices]
    Refer to Table 1
  [Contents]
    (1) Specifications changed to display the register value.
          SDR00L (Address:FFF10h)
          TXD0 (Address:FFF10h)
          SIO00 (Address:FFF10h)
          SDR01L (Address:FFF12h)
          RXD0 (Address:FFF12h)

    (2) Specifications changed to display the register value.
          SIO01 (Address:FFF12h)
          IICS0 (Address:FFF51h)
Table1 Target devices and contents
Target devices
contents
Pin
(1)
(2)
R5F10Y14
10
R5F10Y16
10
R5F10Y17
10
R5F10Y44
16
R5F10Y46
16
R5F10Y47
16
:Target device

Changes from V3.00.03 to V3.00.04 (Oct. 20, 2015)

1. Startup routines modified（CS+ for CC）
    The startup routines for MCUs which have no mirror area have been modified.
    There is no change in the device information file.

Changes from V3.00.02 to V3.00.03 (Sep. 7, 2015)

1. Addition and Modification of SFR Information
- RL78/I1D group
  [Target devices]
    Refer to Table 1
  [Contents]
    (1) The following register have been added.
          P13 (Address:FFF0Dh)

    (2) The BIT register name of FLMODE (Address:F00AAh) bit6 have been changed.
          Before change: MODE2
          After change: MODE0

    (3) The following BIT register have been added: 
          PORF (Address:F00F9h Bit0)
Table1 Target devices and contents
Target devices
contents
Pin
(1)
(2)
(3)
R5F11768
20
R5F1176A
20
R5F11778
24
R5F1177A
24
R5F117A8
30
R5F117AA
30
R5F117AC
30
R5F117BA
32
R5F117BC
32
R5F117GA
48
R5F117GC
48
:Target device

Changes from V3.00.01 to V3.00.02 (Apr. 20, 2015)

1. Deletion for the following devices
- RL78/G14 group
  [Target devices]
    R5F104JK, R5F104JL

Changes from V3.00.00 to V3.00.01 (Dec. 5, 2014)

1. Modification of Pin Configuration Information
- RL78/F13 group
- RL78/F14 group

2. Modification of Debug Information
- RL78/G1G group
  [Contents]
    Modification of frequency information which is used by debugger.

Changes from V1.00.18 to V3.00.00 (Oct. 1, 2014)

1. Division of module
  "Device Information for RL78.78K" is divided into "Device Information for RL78" and "Device Information for 78K".

2. Supported Devices Increased
- RL78/G1G group
  [Target devices]
    R5F11EFA, R5F11EBA, R5F11EAA, R5F11EF8, R5F11EB8, R5F11EA8

3. Deletion for the following devices
- RL78/I1A group
  [Target devices]
    R5F107BC

4. Addition of SFR Information
- RL78/F13 group, RL78/F14 group
  [Target devices]
    R5F10ALF, R5F10ALG, R5F10BLC, R5F10BLD, R5F10BLE,
    R5F10BLF, R5F10BLG, R5F10PLE, R5F10PLF
  [Contents]
    Addition of PU5 register

5. Modification of Debug Information
- RL78/F13 group, RL78/F14 group
  [Contents]
    Modification of fail-safe break information which is used by IECUBE.

Changes of V1.00.18 and earlier

For details about changes of V1.00.18 and earlier, refer to the following URL:
https://www.renesas.com/cs+/eng/CSPlus_DevInfo_RL78_78K.html
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