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RENESAS TOOL NEWS on July 16, 2008: 080716/tn3
| The Simulator Debugger for the SuperH RISC engine Family
Revised to V.9.07.01 |
We have revised the simulator debugger for the SuperH RISC engine family
to V.9.07.01.
The simulator debugger is included in the C/C++ compiler package for the
SuperH RISC engine family. When the compiler package is installed, the
functionality of the simulator debugger is incorporated into the development
environment using High-performance Embedded Workshop.
1. Descriptions of Revision
In the SH2A-FPU simulator, which is included in the simulator debugger
for the SuperH RISC engine family, two functions have been improved and
a problem fixed as follows.
1.1 Functions Improved
(1) The memory map can be set for each MCU.
(2) When the internal ROM is used, the number of cache misses in
ROM cacheis displayed in the Profile window.
1.2 Problem Fixed
The problem with incorrectly providing the number of execution cycles
has been fixed. For details of the problem, see RENESAS TOOL NEWS
Document No. 070916/tn3, published on September 16, 2007, at
http://tool-support.renesas.com/eng/toolnews/070916/tn3.htm
2. How to Update Your Product
Free-of-charge online update is available. Update yours using
AutoUpdate Utility or download the update program from the Web site
at
http://www.renesas.com/sh_sim_download
and execute it.
The Web site is opened on and after August 5, and the service of
AutoUpdate Utility is provided on and after August 7.
The above URL is that of our global site (in English).
3. Notices
(1) This product is included in the compiler package; it cannot be
shipped alone.
(2) The update in Section 2 updates the simulator debugger only.
(3) To update your product to V.9.07.01, make sure that High-performance
Embedded Workshop V.4.04.01 has already been installed.
For details of the V.4.04.01 of the IDE and how to update yours to
it, see RENESAS TOOL NEWS Document No. 080118/tn1 on the Web page at
http://tool-support.renesas.com/eng/toolnews/080118/tn1.htm
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