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MESC TOOL NEWS:
MESCT-NC30WA-980716D
NC30WA and NC30
Precautions
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Please take note of the following problems in using C compilers NC30WA and NC30 for the M16C/60 series of microcomputers.
Problem 1. On "xor" operations between two single bits
- Description
When "xor" operations are performed between two single bits, incorrect codes may be output.
- Versions Concerned
V.1.00 Release 1--V.3.00 Release 1 are concerned with this problem.
- Conditions
The problem may occur if all the following three conditions are satisfied:
- An "xor" ("AND" and "OR") operation between two single bits is performed.
- Both the bit with which the "xor" operation is performed and the destination bit into which the result is stored point to the same address.
- The positions of the bits mentioned above are different from each other.
------------------------------------------------------------------
[Example]
struct tag{
unsigned char b0:1;
unsigned char b1:1;
unsigned char b2:1;
unsigned char b3:2;
unsigned char b4:1;
unsigned char b5:1;
unsigned char b6:1;
unsigned char b7:1;
}bit;
struct tt{
unsigned char b0:1;
unsigned char b1:1;
unsigned char b2:1;
unsigned char b3:2;
unsigned char b4:1;
unsigned char b5:1;
unsigned char b6:1;
unsigned char b7:1;
}bb;
bb.b0=bb.b1^bit.b0;
------------------------------------------------------------------
- Workaround
Assign the result of the operation to a TMP variable temporarily and then transfer it to the destination bit.
NC30WA and NC30 Precautions
MESCT-NC30WA-980716D
Problem 2. On "and" operations performed to constants
- Description
When "and" operations are performed to the data of constants which are cast to pointers of type volatile, system errors may occur.
- Versions Concerned
V.1.00 Release 1--V.3.00 Release 1 are concerned with this problem.
- Conditions
- Optimize option -O, -OR, or -OS is given.
- An "and" operation is performed to the data of a constant which is cast to a pointer of type volatile.
The problem may occur if both of the above conditions are satisfied and a branch with a specific pattern is performed. A branch with a specific pattern is the one that a return or branch exists after the destination of a branch in the generated assembler.
------------------------------------------------------------------
[Example]
unsigned char c;
func(void)
{
switch(c){
case 1:
func();
break;
case 2:
break;
default:
*(volatile int*)(0x0300) &= 0x04 ;
return;
}
func1();
return;
}
------------------------------------------------------------------
- Workaround
Add an asm function just before the description of an "and" operation.
NC30WA and NC30 Precautions
MESCT-NC30WA-980716D
Problem 3. On optimization of expelling invariants in a loop
- Description
When optimization is performed to expel invariants in a loop, incorrect codes may be output.
- Versions Concerned
V.1.00 Release 2--V.3.00 Release 1 are concerned with this problem.
- Conditions
The problem may occur if all the following four conditions are satisfied:
- Optimize option -OS is given.
- Pointers or reads/writes of unions exist in a loop.
- The descriptions of read access and write access are different from each other.
- The memory (pointer) of a read and that of a write point to the same address.
------------------------------------------------------------------
[Example]
for(i = 0x00 ; i < 0x10 ; i++){
if(str->uni.bit.bit16)
a= 1;
str->uni.word[1] = str->uni.word[1] >> 1;
}
------------------------------------------------------------------
In the above example, "str->uni.bit.bit16" points to the same address as "str->uni.word[1]".
- Workaround
Don't use optimize option -OS, or add a dummy inline-function just before a bit access statement.
------------------------------------------------------------------
[Example]
inline void dummy_inline(void){};
for(i = 0x00 ; i < 0x10 ; i++){
dummy_inline();
if(str->uni.bit.bit16)
(The rest is omitted.)
------------------------------------------------------------------
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