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MESC TOOL NEWS:
MESCT-MR32R-990601D
Please take note of the following problem in using real-time OS MR32R for the M32R family of microcomputers.
Versions Concerned
All of the versions from MR32R V.1.00 release 1 to MR32R V.3.00 Release 1 are concerned with this problem.
Problem
When system clock interrupt is serviced with alarm handlers being idle (not defined), the program may not be executed normally by branching to an incorrect address.
The process of the incorrect operation is as follows:
(1)If alarm handlers not defined, _AHCB_stat, the number of alarm handlers not started, is not initialized and is given an indeterminate value.
(2)By being given the value, alarm handlers are assumed it has been defined at the system clock interrupt service; then, the start check of each handler is made (see Note 1).
(3)If the system time matches the start time of an alarm handler, the handler that should not have been defined will be put into operation (see Note 2).
(4)At this time the starting address of the handler _D_AHCB_ENT[_AHCB_stat] is referenced as the entry address for a jump. Since the value of _AHCB_stat is indeterminate, the starting address is also indeterminate, which causes the jump address to be incorrect.
Notes:
- Data items used for the start check of an alarm handler:
__Sys_time: The control data items of system time stored in order of the upper, the middle, and the lower component (each 16 bits in length)
_D_AHCB_TIM_L[ ]: The lower 16 bits of the start time of the alarm handler
_D_AHCB_TIM_L[ ]: The lower 16 bits of the start time of the alarm handler
_D_AHCB_TIM_L[ ]: The lower 16 bits of the start time of the alarm handler
_D_AHCB_ENT[ ]: The starting address of the alarm handler (unsigned 32 bits)
_AHCB_stat: The number of alarm handlers not started (signed 16 bits)
Every upper 16 bits of time data is signed one.
- Timing of jump to an indeterminate address
The jump to an indeterminate address occurs when the system time matches the time that has the upper, middle, and lower 16-bit components each of which is represented by the value of _D_AHCB_TIM_L[_AHCB_stat].
When the initial value of the system time (0000:0000:0000 by default) is 0000:0000:0000 with the set_tim system call not used, the jump to an indeterminate address occurs at the time that the value of _D_AHCB_TIM_L[_AHCB_stat] is 1, i.e., 0001:0001:0001, in the worst case (in the shortest period of time).
(When alarm handlers are not defined, addresses __D_AHCB_TIM_L, __D_AHCB_TIM_M, and __D_AHCB_TIM_H are the same, so the upper, the middle, and the lower component mentioned above are the same.)
The time period is 0x000100010001*10 ms, i.e., about 500 days if a system clock interrupt is set to 10 ms. The longest period is about 45,000 years at 0x7fff:7fff:7fff. This means that the jump to an indeterminate address will occur after about 500 days to 45,000 years of continuous operation.
(When time is set shorter than the previous value by using the set_tim system call, the period of time before the jump occurs will be extended more.)
Workaround
- When any product of MR32R V.1.00 Release 1 to MR32R V.2.00 Release 2 used
(1)Add the following codes to the startup files (crt0mr.ms and start.ms, or crt0mr.s and start.s):
-------------------------------------------------------------------
| ;
| ;Initialize OS system area
| ;
|
| ld24 R4,#__AHCB_stat ;Add this line
| ldi R5,#0 ;Add this line
| sth R5,@R4 ;Add this line
|
| INITIALIZE
|
| bl __set_ipl
|
-------------------------------------------------------------------
- When MR32R V.3.00 Release 1 used
(1)Define the maximum number of alarm handlers as 1 in the configuration file.
-------------------------------------------------------------------
| //
| maxdefine{
| max_task = 3;
| max_int = 32;
| max_alh = 1; ;Add this line
| };
|
-------------------------------------------------------------------
(2)Add the following codes to the startup files (crt0mr.ms and start.ms, or crt0mr.s and start.s):
-------------------------------------------------------------------
| ;
| ;Initialize OS system area
| ;
|
| ld24 R4,#__AHCB_stat ;Add this line
| ldi R5,#0 ;Add this line
| sth R5,@R4 ;Add this line
|
| INITIALIZE
|
| bl __set_ipl
|
-------------------------------------------------------------------
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