5.8 Instruction Set

This section explains the instruction set supported by the CC-RH.

(1)

Description of symbols

Next table lists the meanings of the symbols used further.

Table 5.19

Meaning of Symbols

Symbols

Meaning

CMD

Instruction

CMDi

Instruction(addi, mulhi, satsubi, andi, ori, xori)

reg, reg1, reg2

Register

r0, R0

Zero register

R1

Assembler-reserved register

gp

Global pointer (r4)

ep

Element pointer (r30)

[reg]

Base register

disp

Displacement (Displacement from the address)

32 bits unless otherwise stated.

dispn

n-bit displacement

imm

Immediate

32 bits unless otherwise stated.

immn

n-bit immediate

bit#3

3-bit data for bit number specification

cc#3

3-bit data for specifying CC0 to CC7 (bits 24 to 31) of the FPSR floating-point system register

#label

Absolute address reference of label

label

Offset reference of label in section or PC offset reference

$label

gp offset reference of label

!label

Absolute address reference of label (without instruction expansion)

%label

ep offset reference of label (without instruction expansion)

HIGHW(value)

Higher 16 bits of value

LOWW(value)

Lower 16 bits of value

HIGHW1(value)

Higher 16 bits of value + bit valueNote of bit number 15 of value

HIGH(value)

Upper 8 bits of the lower 16 bits of value

LOW(value)

Lower 8 bits of value

addr

Address

PC

Program counter

PSW

Program status word

regID

System register number (0 to 31)

selID

Group number (0 to 31)

Note

The bit number 0 is LSB (Least Significant Bit).

(2)

Operand

This section describes the description format of operand in assembler. In assembler, register, constant, symbol, label reference, and expression that composes of constant, symbol, label reference, operator and parentheses can be specified as the operands for instruction, and directives.

(a)

Register

The registers that can be specified with the assembler are listed below.Note

r0, zero, r1, r2, hp, r3, sp, r4, gp, r5, tp, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, r20, r21, r22, r23, r24, r25, r26, r27, r28, r29, r30, ep, r31, lp

Note

For the ldsr and stsr instructions, the PSW, and system registers are specified by using the numbers. Further, in assembler, PC cannot be specified as an operand.

 

r0 and zero (Zero register), r2 and hp (Handler stack pointer), r3 and sp (Stack pointer), r4 and gp (Global pointer), r5 and tp (Text pointer), r30 and ep (Element pointer), r31 and lp (Link pointer) shows the same register.

(b)

r0

r0 is the register which normally contains 0 value. This register does not substitute the result of an operation even if used as a destination register. Note that if machine instructions prohibit r0 from being specified as an operand, the assembler outputs the following message and stops assembling.

mov     0x10, r0

E0550240 : Illegal operand (cannot use r0 as destination in RH850 mode).

(c)

r1

The assembler-reserved register (r1) is used as a temporary register when instruction expansion is performed using the assembler. If r1 is specified as a source or destination register, the assembler outputs the following messageNote, then continues assembling.

Note

Output of this message can be suppressed by specifying the warning message suppression option (-Xno_warning) upon starting the assembler.

mov     0x10, r1

W0550013: r1 used as destination register.

The following instructions use r1 for instruction expansion:

ld.b, ld.h, ld.w, ld.bu, ld.hu, st.b, st.h, st.w, add, sddi, sub, subr, mulh, mulhi, mul, mulu, divh, div, divhu, divu, cmp, movea, cmov, satadd, satsub, satsubi, satsubr, or, ori, xor, xori, and, andi, not, tst, set1, clr1, not1, tst1, prepare, dispose

(d)

Constants

As the constituents of the absolute expressions or relative expressions that can be used to specify the operands of the instructions and pseudo-instruction in the assembler, integer constants and character constants can be used.

Floating-point constants can be used to specify the operand of the .float and .double pseudo-instruction.

(e)

Symbols

The assembler supports the use of symbols as the constituents of the absolute expressions or relative expressions that can be used to specify the operands of instructions and directives.

(f)

Label reference

In assembler, label reference can be used as a component of available relative value as shown in operand designation of instruction/directive.

-

Memory reference instruction (Load/store instruction, and bit manipulation instruction)

-

Operation instruction (arithmetic operation instruction, saturated operation instruction, logical operation instruction)

-

Branch instruction

-

Area reservation directive

 

In assembler, the meaning of a label reference varies with the reference method and the differences used in the instructions/directives. Details are shown below.

Table 5.20

Label Reference

Reference Method

Instructions Used

Meaning

#label

Memory reference instruction, operation instruction and jmp instruction

The absolute address of the position at which the definition of label (label) exists (Offset from address 0Note 1).

This has a 32-bit address and must be expanded into two instructions except ld23, st23, mov and jmp instruction.

Area reservation directive

The absolute address of the position at which the definition of label (label) exists (Offset from address 0Note 1).

Note that the 32-bit address is a value masked in accordance with the size of the area secured.

!label

Memory reference instruction, operation instruction

The absolute address of the position at which the definition of label (label) exists (Offset from address 0 Note 1).

This has a 16-bit address and cannot expand instructions if instructions with 16-bit displacement or immediate are specified.

If any other instructions are specified, expansion into appropriate one instruction is possible.

If the address defined by label (label) is not within a range expressible by 16 bits, an error will occur at the link time.

Area reservation directive

The absolute address of the position at which the definition of label (label) exists (Offset from address 0 Note 1).

Note that the 32-bit address is a value masked in accordance with the size of the area secured.

label

Memory reference instruction, operation instruction

The offset in the section of the position where definition of the label (label) exists (offset from the initial address of the section where the definition of label (label) existsNote 2).

This has a 32-bit offset and must be expanded into two instructions except ld23, st23 or mov instruction.

Branch instruction except jmp instruction

The PC offset at the position where definition of label (label) exists (offset from the initial address of the instruction using the reference of label (label)).

Area reservation directive

The offset in the section of the position where definition of the label (label) exists (offset from the initial address of the section where the definition of label (label) existsNote 2).

Note that the 32-bit offset is a value masked in accordance with the size of the area secured.

%label

Memory reference instruction, operation instruction

This has a 16-bit offset and cannot expand instructions if instructions with 16-bit displacement or immediate are specified.

If any other instructions are specified, expansion into appropriate one instruction is possible.

If the address defined by label (label) is not within a range expressible by 16 bits, an error will occur at the link time.

Area reservation directive

The ep offset at the position where definition of the label (label) exists (offset from the address showing the element pointer).

Note that the 32-bit offset is a value masked in accordance with the size of the area secured.

$label

Memory reference instruction, operation instruction

The gp offset at the position where definition of the label (label) exists (offset from the address showing the global pointer).

Note 1.

The offset from address 0 in object module file after link.

Note 2.

The offset from the first address of the section (output section) in which the definition of label (label) exists is allocated in the linked object module file.

 

The meanings of label references for memory reference instructions, operation instructions, branch instructions, and area allocation pseudo-instruction are shown below.

Table 5.21

Memory Reference Instruction

Reference Method

Meaning

#label[reg]

The absolute address of label (label) is treated as a displacement.

This has a 32-bit value and must be expanded into two instructions except ld23 or st23 instruction. By setting #label[r0], reference by an absolute address can be specified.

Part of [reg] can be omitted. If omitted, the assembler assumes that [r0] has been specified.

label[reg]

The offset in the section of label (label) is treated as a displacement.

This has a 32-bit value and must be expanded into two instructions except ld23 or st23 instruction. By specifying a register indicating the first address of section as reg and thereby setting label[reg], general register relative reference can be specified.

$label[reg]

The gp offset of label (label) is treated as a displacement.

This has either a 32-bit or 16-bit value, from the section defined by label (label), and pattern of instruction expansion changes accordingly Note. If an instruction with a 16-bit value is expanded and the offset calculated from the address defined by label (label) is not within a range that can be expressed in 16 bits, an error is output at the link time. By setting $label [gp], relative reference of the gp register (called a gp offset reference) can be specified. Part of [reg] can be omitted. If omitted, the assembler assumes that [gp] has been specified.

!label[reg]

The absolute address of label (label) is treated as a displacement.

This has a 16-bit value and instruction is not expanded. If the address defined by label (label) cannot be expressed in 16 bits, an error is output at the link time. By setting !lable[r0], reference by an absolute address can be specified.

Part of [reg] can be omitted. If omitted, the assembler assumes that [r0] has been specified.

However, unlike #label[reg] reference, instruction expansion is not executed.

%label[reg]

The offset from the ep symbol in the position where definition of the label (label) exists is treated as a displacement.

This either has a 16-bit value, or depending on the instruction a value lower than this, and if it is not a value that can be expressed within this range, an error is output at the link time.

Part of [reg] can be omitted. If omitted, the assembler assumes that [ep] has been specified.

 

Table 5.22

Operation Instructions

Reference Method

Significance

#label

The absolute address of label (label) is treated as an immediate.

This has a 32-bit value and must be expanded into two instructions.

label

The offset in the section of label (label) is treated as an immediate.

This has a 32-bit value and must be expanded into two instructions.

$label

The gp offset of label (label) is treated as an immediate.

This either has a 32-bit or 16-bit value, from the section defined by label (label), and pattern of instruction changes accordingly Note 1. If an instruction with a 16-bit value is expanded and the offset calculated from the address defined by label (label) is not within a range that can be expressed in 16 bits, an error is output at the link time.

!label

The absolute address of label (label) is treated as an immediate.

This has a 16-bit value. If operation instruction for which a 16-bit value can be specify as an immediate are specified, and instruction is not expanded. If the value is not within a range that can be expressed in 16 bits, an error is output at the link time.

%label

The offset from the ep symbol in the position where definition of the label (label) exists is treated as an immediate.

This has a 16-bit value. If operation instruction for which a 16-bit value can be specify as an immediate are specified, and instruction is not expanded. If the value is not within a range that can be expressed in 16 bits, an error is output at the link time.

 

Table 5.23

Branch Instructions

Reference Method

Meaning

#label

In jmp instruction, the absolute address of label (label) is treated as a jump destination address.

This has a 32-bit value and must be expanded into two instructions.

label

In branch instructions other than the jmp instruction, PC offset of the label (label) is treated as a displacement.

This has a 22-bit value, and if it is not within a range that can be expressed in 22 bits, an error is output at the link time.

 

Table 5.24

Area Reservation Directives

Reference Method

Meaning

#label

!label

In .db4/.db2/.db directive, the absolute address of the label (label) is treated as a value.

This has a 32-bit value, but is masked in accordance with the bit width of each directive.

label

In .db4/.db2/.db directive, the offset in the section defined by label (label) is treated as a value.

This has a 32-bit value, but is masked in accordance with the bit width of each directive.

%label

The .db4, .db2, and .db directives treat the ep offset of label label as a value.

This has a 32-bit value, but is masked in accordance with the bit width of each directive.

$label

The .db4, .db2, and .db directives treat the gp offset of label label as a value.

This has a 32-bit value, but is masked in accordance with the bit width of each directive.

(g)

ep offset reference

This section describes the ep offset reference. The CC-RH assumes that data explicitly stored in the sections with the following relocation attribute is shown below.

Reference through the offset from address indicated by the element pointer (ep).

 

-

TDATA/TDATA4/TBSS4/TDATA5/TBSS5/TDATA7/TBSS7/TDATA8/TBSS8 section (Data is referred by memory reference instructions (sld/sst) of a small code size)

-

EDATA/EBSS section (Data is referred by memory reference instructions (ld/st) of a large code size)

-

EDATA23/EBSS23 section (Data is referred by memory reference instructions (ld23/st23) of a large code size)

Figure 5.2

Memory Location Image for ep Offset Reference Section

 

<1>

Data allocation

In ep offset reference section, data is allocated to the sections as follows:

 

-

When developing a program in C

Allocate data by specifying the section attribute string starting with "ep_" in the "#pragma section" instruction.

 

-

When developing a program in assembly language

Data is allocated to the section of tdata, tdata4, tbss4, tdata5, tbss5, tdata7, tbss7, tdata8, tbss8, edata, ebss, edata23, or ebss23 relocation attribute sections by the section definition directives.

<2>

Data reference

In cases where a reference via %label is made, the assembler generates a sequence of machine-language instructions to perform reference to the data at the corresponding ep offset.

Example

        .dseg   EDATA
sdata:  .db2    0xFFF0
        .dseg   DATA
data:   .db2    0xFFF0
        .cseg   TEXT
        ld.h    %sdata, r20     ; (1)
        ld.h    %data, r20      ; (2)

 

The assembler generates machine-language instructions that treat references via %label as ep-offset references in the cases of both (1) and (2).

The assembler assumes that the section in which the data is located is correct. As a result, it will not detect errors in data placement.

(h)

gp offset reference

This section describes the gp offset reference. The CC-RH assumes that data stored in the sections with the following relocation attribute is basically shown below.

Referred by the offset from the address indicated by global pointer (gp).

-

SDATA/SBSS section (Data is referred by memory reference instructions (ld/st) of a large code size)

-

SDATA23/SBSS23 section (Data is referred by memory reference instructions (ld23/st23) of a large code size)

If r0-relative memory allocation for internal ROM or RAM is not done with the "#pragma section" command of C, or an assembly language section definition directive, all data is subject to gp offset reference.

<1>

Data allocation

Figure 5.3

Memory Location Image for gp Offset Reference Section

Remark

The sum of sdata- and sbss-attribute sections is 64 KB. gp is the center of the sdata section and sbss section.

 

In gp offset reference section, data is allocated to the sections as follows:

Explicitly allocate data that will be frequently referred to the sdata/sbss/sdata23/sbss23 sections. For allocation, use a section definition directive when using the assembly language, or the #pragma section command when using C.

<2>

Data reference

-

If the data has a definition in a specified file.

-

If the data is to be allocated to the sdata or sbss sectionNote.

Generates a machine instruction that performs reference by using a16-bit displacement.

-

If the data is not allocated to the sdata or sbss section.

Generates a machine instruction string that performs reference by using a 32-bit displacement.

-

If the data does not have a definition in a specified file.

Assumes that the data is to be allocated to the sdata or sbss section (the label referenced by gp offset has a definition in the sdata/sbss section) and generates a machine instruction that performs reference by using a 16-bit displacement.

(i)

About HIGH/LOW/HIGHW/LOWW/HIGHW1

<1>

To refer memory by using 32-bit displacement

The assembler performs instruction expansion to refer the memory by using a 32-bit displacement, and generates an instruction string that performs the reference, by using the movhi and memory reference instructions and thereby constituting a 32-bit displacement from the higher 16 bits and lower 16 bits of the 32-bit displacement.

Example

ld.w    0x18000[r11], r12
movhi   HIGHW1(0x18000), r11, r1
ld.w    LOWW(0x18000)[r1], r12

 

At this time, the memory reference instruction of machine instructions that uses the lower 16 bits as a displacement sign-extends the specified 16-bit displacement to a 32-bit value. To adjust the sign-extended bits, the assembler does not merely configure the displacement of the higher 16 bits by using the movhi instruction, instead it configures the following displacement.

Higher 16 bits + the most significant bit (bit of bit number 15) of the lower 16 bits

<2>

HIGHW/LOWW/HIGHW1/HIGH/LOW

In the next table, the assembler can specify the higher 16 bits of a 32-bit value, the lower 16 bits of a 32-bit value, the value of the higher 16 bits + bit 15 of a 32-bit value, the higher 8 bits of a 16-bit value, and the lower 8 bits of a 16-bit value by using HIGHW, LOWW, HIGHW, HIGH, and LOW.Note

Note

If this information cannot be internally resolved by the assembler, it is reflected in the relocation information and subsequently resolved by the link editor.

Table 5.25

Area Reservation Directives

HIGHW/LOWW/HIGHW1/HIGH/LOW

Meaning

HIGHW (value)

Higher 16 bits of value

LOWW (value)

Lower 16 bits of value

HIGHW1 (value)

Higher 16 bits of value + bit value of bit number 15 of value

HIGH (value)

Upper 8 bits of the lower 16 bits of value

LOW (value)

Lower 8 bits of value

Example

        .dseg   DATA
L1:
            :
        .cseg   TEXT
        movhi   HIGHW ($L1), r0, r10  ; Stores the higher 16 bits of the gp
                                      ; offset value of L1 in the higher 16 
                                      ; bits of r10, and the lower 16 bits to 0
        movea   LOWW ($L1), r0, r10   ; Sign-extends the lower 16 bits of the gp
                                      ; offset of L1 and stores to r10
            :