Other break causes | CS+ V5.00.00

2.9.6 Other break causes

The cause of the break other than the described above is as follows:

You can confirm the break cause with the Status message on the statusbar in the Main window, Output panel, or Trace panel [Simulator].

Table 2.6

Other Break Causes

Break Cause	Debug Tool
Break Cause	Full-spec emulator	E1/E20	Simulator
Full of the trace memoryNote 1
An access to non-mapped area	-	-
A writing to write-protected area	-	-
An occurrence of Temporary BreakNote 2
Step execution count-over
An occurrence of Relay BreakNote 3

Note 1.

The operation depends on the setting of the [Operation after trace memory is full] property in the [Trace] category on the [Debug Tool Settings] tab of the Property panel.

Note 2.

A break that is internally used by CS+ (Users cannot use it.)

Note 3.

A break for a synchronous execution and a synchronous break, in a microcontroller that supports multi-core