Usage example
Start data transfer by the end of A/D conversion.
(Get A/D conversion results of 4 pins and copy them to RAM. Then, calculate the average of the results.)
[GUI setting example]
|
DMA controller |
Used | |||
|
DMA0 |
Used | |||
|
DMAoperation setting |
Used | |||
|
Transfer direction setting |
SFR to internal RAM | |||
|
Transfer data size setting |
8 bits | |||
|
SFR address |
ADCR - 0x000fff1e | |||
|
RAM address |
0xffe00 | |||
|
Transfer byte count |
4 | |||
|
Trigger signal |
INTAD (Please set INTAD) | |||
|
DMA0 transfer end interrupt (INTDMA0) |
Used | |||
|
Priority |
Low | |||
|
A/D convertor |
Used | |||
|
ADC |
Used | |||
|
A/D convertor operation setting |
Used | |||
|
Comparator operation setting |
Operation | |||
|
Resolution setting |
8 bits | |||
|
VREF(+) setting |
VDD | |||
|
VREF(-) setting |
VSS | |||
|
Trigger mode setting |
Software trigger mode | |||
|
Operation mode setting |
Countinous select mode | |||
|
ANI0 - ANI7 analog input selection |
ANI0 - ANI3 | |||
|
A/D channel selection |
ANI0 - ANI3 | |||
|
Conversion time mode |
Normal 1 | |||
|
Conversion time |
34 (1088/fCLK)(μs) | |||
|
Conversion result upper/lower bound value setting |
Generates an interrupt request (INTAD) when ADLL≦ADCRH≦ADUL | |||
|
Upper bound (ADUL) value |
255 | |||
|
Lower bound (ADLL) value |
0 | |||
|
Use A/D interrupt (INTAD) |
Used | |||
[API setting example]
r_main.c
void main(void)
{
R_MAIN_UserInit();
/* Start user code. Do not edit comment generated here */
/* Enable DMA0 transfer */
R_DMAC0_Start();
/* Start the AD converter */
R_ADC_Start();
while (1U)
{
NOP();
}
/* End user code. Do not edit comment generated here */
}
r_cg_dmac_user.c
/* Start user code for include. Do not edit comment generated here */
#include "r_cg_adc.h"
/* End user code. Do not edit comment generated here */
/* Start user code for pragma. Do not edit comment generated here */
#pragma address (g_adc_buf = 0x0ffe00)
/* End user code. Do not edit comment generated here */
/* Start user code for global. Do not edit comment generated here */
volatile uint8_t g_adc_buf[5][4];
volatile uint8_t g_adc_buf_cnt = 0U;
/* End user code. Do not edit comment generated here */
static void __near r_dmac0_interrupt(void)
{
/* Start user code. Do not edit comment generated here */
uint8_t i;
uint8_t j;
uint16_t temp;
/* Stop the AD converter */
R_ADC_Stop();
/* Disable DMA0 transfer */
R_DMAC0_Stop();
/* Change DMA0_RAM address */
if ((++g_adc_buf_cnt) < 4U)
{
DRA0 += 4U;
}
else
{
DRA0 = _FE00_DMA0_RAM_ADDRESS;
g_adc_buf_cnt = 0U;
/* Calculate the average */
for (i = 0; i < 4U; i++)
{
temp = 0U;
for (j = 0; j < 4U; j++)
{
temp += g_adc_buf[j][i];
}
g_adc_buf[4][i] = temp / 4U;
}
}
/* Enable DMA0 transfer */
R_DMAC0_Start();
/* Start the AD converter */
R_ADC_Start();
/* End user code. Do not edit comment generated here */
}