Development Tools

2.22 FAA Simulation [Simulator]

This section describes the simulation functions and points for caution on using the functions for the FAA when the selected microcontroller incorporates it.

-	FAA Simulation

The simulator simulates the functions of the RL78 instruction simulator and the following items.

-	FAA (instructions and functions)

SHDMEM

Divider

-	Interrupt function

-	Timer array unit (only channels 0 to 3 in unit 0 and only available as interval timers)Note

Note	For points for caution on the timer array unit, refer to the release note for the simulator that includes simulation of the peripheral functions of RL78 microcontrollers.,

-	Points for caution on using the simulation functions

(1)	The following FAA functions are not supported.

-	Input event controller (GRNINPUTC)

-	Low-power functions (SYSC.SLP and DSYSC.SLP bits)

-	Address bus select function

(2)	When the DIVST bit in the FAADUC register is set to 1 so that the divider starts a division in the actual hardware, the operation will end in 16 clock cycles; the simulator promptly completes the division and generates the interrupt (INTMD).

(3)	The interrupt controller (GRNINTC) does not support the following operation.

-	Interrupt requests on detecting of an input event among the internal interrupt sources of the FAA

-	All interrupt sources which are externally input to the FAA

(4)	For the reference timing controller, when a free-running counter starts operation (FCCNT.FCEN = 1), it continues operating even if a break occurs on the CPU side or FAA side or both sides. The free-running counter stops operation when FCCNT.FCEN = 0 or FAAEN = 0.

(5)	If a free-running counter in the section for generating the reference timing of the FAA is operated in the CPU program or the SFR panel with the following steps and the comparison value of the timing is small, an interrupt generated by the compare match with the timer may be ignored.

(a)	Setting a register in the section for generating a reference timing

Example

TMCMP0 = 0xF, TMMSK0 = 0x0

(b)	Operating a free-running counter

(c)	Setting “WIND = 0”

(d)	Setting “SYSC.ENB = 1”

Note	In the steps above, an interrupt generated by the compare match with the timer is ignored if the operation of a free-running counter starts after step (b) and FCNT is counted up to 0xF before step (d).

(6)	When FAAEN = 0, the simulator will access (read or write) the FAA instruction code memory and FAA data memory from the area to which the target resources have been assigned.

(7)	Since the CPU and FAA are not run in synchronization by the simulator, the Run-Break times of the CPU that include the ranges where the CPU starts execution of the FAA are not correct.