This section describes the RL78 instruction simulator.
The RL78 instruction simulator simulates the following functions.
Instructions (each instruction of the RL78-S1, RL78-S2, and RL78-S3 cores) |
The list of multiplier and divider and multiply-accumulator operations below only applies to the RL78-S2 core.
16 bits x 16 bits = 32 bits (unsigned)
16 bits x 16 bits = 32 bits (signed)
16 bits x 16 bits + 32 bits = 32 bits (unsigned)
16 bits x 16 bits + 32 bits = 32 bits (signed)
32 bits / 32 bits = 32-bit result and 32-bit remainder (unsigned)
When the multiplier and divider or multiply-accumulator are used in division mode, the division processing will be finished in one clock cycle. |
When the multiplier and divider or multiply-accumulator are used in division mode, an interrupt is not generated at the end of the division operation. However, the SFR which indicates the end of division is changed, that is, the DIVST bit in the multiplication/division control register (MDUC) is cleared to 0. |
The BCD correction circuit is supported.
The CPU clock is generated according to the specifications of the clock generator for the RL78/G13 (and some of the specifications is for the RL78/G14).
Only the following SFRs are supported.
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Bits 0, 1, and 2 (AMPH, AMPHS0, and AMPHS1) are not supported. |
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Operation is according to the specifications of the RL78/G14. |
For the settings of the frequency of the high-speed on-chip oscillator for the user option byte (000C2H), FRQSEL0 to FRQSEL4 (bits 0 to 4) are supported with the specifications of the RL78/G14.
Specify the clock for the X1 oscillator with the [Main clock frequency [MHz]] property in the [Clock] category on the [Connect Settings] tabbed page of the [Property] panel. |
Specify the clock for the XT1 oscillator with the [Sub clock frequency [kHz]] property in the [Clock] category on the [Connect Settings] tabbed page of the [Property] panel. |
The simulator does not simulate the oscillation stabilization time. When oscillation starts, the OSTC register does not count up and its value is set according to the setting of the OSTS. |
If the specifications of the SFR for the selected microcontroller differ from those of the RL78/G13, the RL78 instruction simulator operates with the specifications of the RL78/G13. |
If the SFR is not present in the selected microcontroller, the RL78 instruction simulator operates with the value after the SFR for the RL78/G13 has been reset. |
If the specifications of the user option byte (000C2H) for the selected microcontroller differ from those of the option byte of the RL78/G14, the RL78 instruction simulator operates with the specifications of the RL78/G14. |
Even if an option byte is not present in the selected microcontroller, the RL78 instruction simulator reads the 000C2H address as the user option byte and operates with the specifications of the RL78/G14. |
Even if a clock source in the RL78/G13 specifications is not present in the selected microcontroller, the clock source operates with the specifications of the RL78/G13. |
If the specifications of frequencies of the low-speed on-chip oscillator clock (fIL) and high-speed on-chip oscillator clock (fIH) for the selected microcontroller differ from those of the RL78/G13, the RL78 instruction simulator operates with the specifications of the RL78/G13. |
Flash memory (e.g. flash self-programming functions and the procedure for accessing the data flash memory) |