Selection of Optimum Branch Instruction

5.1.9 Selection of Optimum Branch Instruction

(1)	Unconditional Relative Branch (BRA) Instruction

(a)	Specifiable Branch Distance Specifiers

.S 3-bit PC relative (PC + pcdsp:3, 3 ≤ pcdsp:3 ≤ 10)

.B 8-bit PC relative (PC + pcdsp:8, –128 ≤ pcdsp:8 ≤ 127)

.W 16-bit PC relative (PC + pcdsp:16, –32768 ≤ pcdsp:16 ≤ 32767)

.A 24-bit PC relative (PC + pcdsp:24, –8388608 ≤ pcdsp:24 ≤ 8388607)

.L Register relative (PC + Rs, –2147483648 ≤ Rs ≤ 2147483647)

Note	The register relative distance is selected only when a register is specified as an operand; it is not used automatically through optimum selection.

(b)	Optimum Selection

-	The assembler selects the shortest branch distance when the operand of an unconditional relative branch instruction satisfies the conditions for optimum branch selection. For the conditions, refer to section 5.1.4 (3) Branch Distance Specifier.

-	When the operand does not satisfy the conditions, the assembler selects the 24-bit PC relative distance (.A).

(2)	Relative Subroutine Branch (BSR) Instruction

(a)	Specifiable Branch Distance Specifier

.W 16-bit PC relative (PC + pcdsp:16, –32768 ≤ pcdsp:16 ≤ 32767)

.A 24-bit PC relative (PC + pcdsp:24, –8388608 ≤ pcdsp:24 ≤ 8388607)

.L Register relative (PC + Rs, –2147483648 ≤ Rs ≤ 2147483647)

Note	The register relative distance is selected only when a register is specified as an operand; it is not used automatically through optimum selection.

(b)	Optimum Selection

-	The assembler selects the shortest branch distance when the operand of a relative subroutine branch instruction satisfies the conditions for optimum branch selection. For the conditions, refer to section 5.1.4 (3) Branch Distance Specifier.

-	When the operand does not satisfy the conditions, the assembler selects the 24-bit PC relative distance (.A).

(3)	Conditional Branch (BCnd) Instruction

(a)	Specifiable Branch Distance Specifiers

BEQ.S 3-bit PC relative (PC + pcdsp:3, 3 ≤ pcdsp:3 ≤ 10)

BNE.S 3-bit PC relative (PC + pcdsp:3, 3 ≤ pcdsp:3 ≤ 10)

BCnd.B 8-bit PC relative (PC + pcdsp:8, –128 ≤ pcdsp:8 ≤ 127)

BEQ.W 16-bit PC relative (PC + pcdsp:16, –32768 ≤ pcdsp:16 ≤ 32767)

BNE.W 16-bit PC relative (PC + pcdsp:16, –32768 ≤ pcdsp:16 ≤ 32767)

(b)	Optimum Selection

When the operand of a conditional branch instruction satisfies the conditions for optimum branch selection, the assembler generates the optimum code for the conditional branch instruction by replacing it with a combination of a conditional branch instruction with an inverted logic (condition) and an unconditional relative branch instruction with an optimum branch distance.

-	When the operand does not satisfy the conditions, the assembler selects the 8-bit PC relative distance (.B) or 16-bit PC relative distance (.W).

(c)	Conditional Branch Instructions to Be Replaced and Corresponding Instruction Replacements

Table 5.28

Replacement Rules of Conditional Branch Instructions

Conditional Branch Instruction	Instruction Replacement	Conditional Branch Instruction	Instruction Replacement
BNC/BLTU dest	BC ..xx BRA.A dest ..xx:	BC/BGEU dest	BNC ..xx BRA.A dest ..xx:
BLEU dest	BGTU ..xx BRA.A dest ..xx:	BGTU dest	BLEU ..xx BRA.A dest ..xx:
BNZ/BNE dest	BZ ..xx BRA.A dest ..xx:	BZ/BEQ dest	BNZ ..xx BRA.A dest ..xx:
BPZ dest	BN ..xx BRA.A dest ..xx:	BO dest	BNO ..xx BRA.A dest ..xx:
BGT dest	BLE ..xx BRA.A dest ..xx:	BLE dest	BGT ..xx BRA.A dest ..xx:
BGE dest	BLT ..xx BRA.A dest ..xx:	BLT dest	BGE ..xx BRA.A dest ..xx:

Note	In this table, the branch distance in unconditional relative branch instructions is a 24–bit PC relative value. The "..xx" label and the unconditional relative branch instruction are processed within the assembler; only the resultant code is output to the source list file.