wai_flg
ER wai_flg (ID flgid, FLGPTN waiptn, MODE wfmode, FLGPTN *p_flgptn);
This service call checks whether the bit pattern specified by parameter waiptn and the bit pattern that satisfies the required condition specified by parameter wfmode are set to the eventflag specified by parameter flgid.
If a bit pattern that satisfies the required condition has been set for the target eventflag, the bit pattern of the target eventflag is stored in the area specified by parameter p_flgptn.
If the bit pattern of the target eventflag does not satisfy the required condition when this service call is issued, the invoking task is queued to the target eventflag wait queue.
As a result, the invoking task is unlinked from the ready queue and is moved from the RUNNING state to the WAITING state (WAITING state for an eventflag).
A bit pattern that satisfies the required condition was set to the target eventflag as a result of issuing set_flg.
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A bit pattern that satisfies the required condition was set to the target eventflag as a result of issuing iset_flg.
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- wfmode == TWF_ANDW
Checks whether all of the bits to which 1 is set by parameter waiptn are set as the target eventflag.
Checks whether all of the bits to which 1 is set by parameter waiptn are set as the target eventflag.
- wfmode == TWF_ORW
Checks which bit, among bits to which 1 is set by parameter waiptn, is set as the target eventflag.
Checks which bit, among bits to which 1 is set by parameter waiptn, is set as the target eventflag.
Note 1 With the RI600PX, whether to enable queuing of multiple tasks to the event flag wait queue is defined at eventflag creation. If this service call is issued for the event flag (TA_WSGL attribute) to which a wait task is queued, therefore, "E_ILUSE" is returned regardless of whether the required condition is immediately satisfied.
Note 2 Invoking tasks are queued to the target event flag (TA_WMUL attribute) wait queue in the order specified at creating the eventflag (FIFO order or current priority order).
However, when the TA_CLR attribute is not specified, the wait queue is managed in the FIFO order even if the priority order is specified. This behavior falls outside mITRON4.0 specification.
However, when the TA_CLR attribute is not specified, the wait queue is managed in the FIFO order even if the priority order is specified. This behavior falls outside mITRON4.0 specification.
Note 3 The RI600PX performs bit pattern clear processing (0 setting) when the required condition of the target eventflag (TA_CLR attribute) is satisfied.