CHAPTER 1 OVERVIEW
The RI850V4 is a built-in real-time, multi-task OS that provides a highly efficient real-time, multi-task environment to increases the application range of processor control units.
The RI850V4 is a high-speed, compact OS capable of being stored in and run from the ROM of a target system.
Control equipment demands systems that can rapidly respond to events occurring both internal and external to the equipment. Conventional systems have utilized simple interrupt handling as a means of satisfying this demand. As control equipment has become more powerful, however, it has proved difficult for systems to satisfy these requirements by means of simple interrupt handling alone.
In other words, the task of managing the order in which internal and external events are processed has become increasingly difficult as systems have increased in complexity and programs have become larger.
The main purpose of a real-time OS is to respond to internal and external events rapidly and execute programs in the optimum order.
A "task" is the minimum unit in which a program can be executed by an OS. "Multi-task" is the name given to the mode of operation in which a single processor processes multiple tasks concurrently.
Actually, the processor can handle no more than one program (instruction) at a time. But, by switching the processor's attention to individual tasks on a regular basis (at a certain timing) it appears that the tasks are being processed simultaneously.
A multi-task OS enables the parallel processing of tasks by switching the tasks to be executed as determined by the system.
One important purpose of a multi-task OS is to improve the throughput of the overall system through the parallel processing of multiple tasks.
The RI850V4 supports build processing for multi-core devices. The target processor element (PE) where the RI850V4 is to be used can be specified and the RI850V4 can be used in multiple PEs at the same time.
The RI850V4 is a real-time OS for a single core, which is intended to operate in a single PE, and it does not provide facilities for controlling the processing between PEs.
As a measure for implementing the control of the processing between PEs, a library specialized for multi-core devices can be used. Renesas Electronics offers the "libipcx library for communication and exclusive control between processor elements" (hereafter called libipcx), which is a sample library supporting the RH850 multi-core devices. Using the RI850V4 and libipcx together enables control of the processing between PEs.
The following is a list of reserved OS resources that are exclusively used by the RI850V4 and cannot be modified from processing programs.
Note Whether the exception handler vector address (EBASE) or the base address of the interrupt handler table (INTBP) is reserved depends on the option settings for activation of the CONFIGURATOR CF850V4. When -ebase= <Exception Base Address> is specified, the exception handler vector address (EBASE) is handled as a reserved resource; when -intbp=<Interrupt Base Address> is specified, the base address of the interrupt handler table (INTBP) is handled as a reserved resource.