R6:R5:R4 = R6:R5:R4 + *R1 * *R2;
1. If this instruction is executed with R3 set to 0, it is ignored and has no effect on registers and flags. |
This instruction performs a multiply-and-accumulate operation with the multiplicand addresses specified by R1, the multiplier addresses specified by R2, and the number of multiply-and-accumulate operations specified by R3. The operands and result are handled as signed values, and the result is placed in R6:R5:R4 as an 80-bit datum. Note that the higher-order 16 bits of R6 are set to the value obtained by sign-extending the lower-order 16 bits of R6. |
Specify the initial value in R6:R5:R4 before executing the instruction. Furthermore, be sure to set R6 to FFFFFFFFh when R5:R4 is negative or to 00000000h if R5:R4 is positive. |
An interrupt request during execution of this instruction will be accepted, so processing of the instruction will be suspended. That is, execution of the instruction will continue on return from the interrupt processing routine. However, be sure to save the contents of the R1, R2, R3, R4, R5, R6, and PSW when an interrupt is generated and restore them when execution is returned from the interrupt routine. |
In execution of the instruction, the data may be prefetched from the multiplicand addresses specified by R1 and the multiplier addresses specified by R2, with R3 as the upper limit. For details of the data size to be prefetched, refer to the hardware manual of each product. |
The accumulator (ACC) is used to perform the function. The value of ACC after executing the instruction is undefined. |
S : The flag is set if the MSB of R6 is 1; otherwise it is cleared.
O: The flag is set if the R6:R5:R4 data is greater than 2**53-1 or smaller than -2**53; otherwise it is cleared.