Conditional move (double precision) (Floating-point Conditional Move (Double))
When the CC(7:0) bits of the FPSR register specified by fcbit in the opcode are true (1), data from the register pair specified by reg1 is stored in the register pair specified by reg3. When these bits are false (0), data from the register pair specified by reg2 is stored in the register pair specified by reg3.
If r0 is specified as reg3 in the cmovf.d instruction, the assembler outputs the following message and stops assembling. |