BCnd | CS+ V5.00.00

BCnd	Relative conditional branch	BCnd
	Branch Conditionally

[Syntax]

BCnd(.length) src

[Operation]

if ( Cnd )

PC = PC + src;

[Function]

-	This instruction logically ANDs dest and src and stores the result in dest.

-	If dest is A0 or A1 and the selected size specifier (.size) is (.B), src is zero-expanded to perform calculation in 16. If src is A0 or A1, operation is performed on the eight low-order bits of A0 or A1.

BCnd		Condition	Expression
BGEU, BC	C == 1	Equal to or greater than/C flag is 1	<=
BEQ, BZ	Z == 1	Equal to/Z flag is 1	=
BGTU	(C & ~Z) == 1	Greater than	<
BPZ	S == 0	Positive or zero	> 0
BGE	(S ^ O) == 0	Equal to or greater than as signed integer	<=
BGT	((S ^ O) \|Z) == 0	Greater than as signed integer	<
BO	O == 1	O flag is 1
BLTU, BNC	C == 0	Less than/C flag is 0	<=
BNE, BNZ	Z == 0	Not equal to/Z flag is 0
BLEU	(C & ~Z) == 0	Equal to or less than
BN	S == 1	Negative	0>
BLE	((S ^ O) \|Z) == 1	Equal to or less than as signed integer	>=
BLT	(S ^ O) == 1	Less than as signed integer	>
BNO	O == 0	O flag is 0

[Instruction Format]

Syntax	Processng Size	src	range of pcdsp	Code size (Byte)
BEQ.S src	S	pcdsp:3	3≦pcdsp≦10	1
BNE.S src	S	pcdsp:3	3≦pcdsp≦10	1
BCnd.B src	B	pcdsp:8	-128≦pcdsp≦127	2
BEQ.W src	W	pcdsp:16	-32768≦pcdsp≦32767	3
BNE.W src	W	pcdsp:16	-32768≦pcdsp≦32767	3

[Flag Change]

This instruction does not affect the states of flags.

[Description Example]

BC label1

BC.B label2

Note

For the RX Family assembler manufactured by Renesas Technology Corp., enter a destination address specified by a label or an effective address as the displacement value (pcdsp:3, pcdsp:8, pcdsp:16). The value of the specified address minus the address where the instruction is allocated will be stored in the pcdsp section of the instruction.

BC label

BC 1000h