Conversion to fixed-point format (double precision) (Floating-point Convert Double to Long (Double))
This instruction arithmetically converts the double-precision floating-point format contents of the register pair specified by general-purpose register reg1 to 64-bit fixed-point format, in accordance with the current rounding mode, and stores the result in the register pair specified by general-purpose register reg2.
When the source operand is infinite or not-a-number, or when the rounded result is outside the range of 263 - 1 to -263, an IEEE754-defined invalid operation exception is detected.
If invalid operation exceptions are not enabled, the preservation bit (bit 4) of the FPSR register is set as an invalid operation and no exception occurs. The return value differs as follows, according to differences among sources.