trncf.dul


Conversion to unsigned fixed-point format (double precision) (Floating-point Convert Double to Unsigned-Long, round toward zero (Double))

[Syntax]

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trncf.dul reg1, reg2

[Function]

This instruction arithmetically converts the double-precision floating-point format contents of the register pair specified by general-purpose register reg1 to unsigned 64-bit fixed-point format, and stores the result in the register pair specified by general-purpose register reg2.

The result is rounded in the zero direction, regardless of the current rounding mode.

The result is rounded in the zero direction, regardless of the current rounding mode.

When the source operand is infinite, not-a-number, or negative number, or when the rounded result is outside the range of 264 - 1 to 0, an IEEE754-defined invalid operation exception is detected.

If invalid operation exceptions are not enabled, the preservation bit (bit 4) of the FPSR register is set as an invalid operation and no exception occurs. The return value differs as follows, according to differences among sources.

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Source is a positive number outside the range of 264 - 1 to 0, or + : 264 - 1 is returned.

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Source is a negative number, not-a-number, or - : 0 is returned.

[Description]

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The assembler generates one trncf.dul machine instruction.