Conversion to unsigned fixed-point format (single precision) (Floating-point Convert Single to Unsigned-Long (Single))
This instruction arithmetically converts the single-precision floating-point format contents of general-purpose register reg1 to unsigned 64-bit fixed-point format, in accordance with the current rounding mode, and stores the result in the register pair specified by general-purpose register reg2.
When the source operand is infinite, not-a-number, or negative number, or when the rounded result is outside the range of 264 - 1 to 0, an IEEE754-defined invalid operation exception is detected.
If invalid operation exceptions are not enabled, the preservation bit (bit 4) of the FPSR register is set as an invalid operation and no exception occurs. The return value differs as follows, according to differences among sources.