adf

Adds on condition flag.

[Syntax]

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adf imm4, reg1, reg2, reg3

-

adfcnd reg1, reg2, reg3

 

The following can be specified for imm4:

-

Absolute expression having a value up to 4 bits (0xD cannot be specified)

[Function]

-

Syntax "adf imm4, reg1, reg2, reg3"

It compares the current flag condition with the flag condition indicated by the value of the lower 4 bits of the absolute expression (see "Table 5.28 adfcnd Instruction List") specified by the first operand.

If the values match, adds the word data of the register specified by the second operand to the word data of the register specified by the third operand. And 1 is added to the addition result and that result is stored in the register specified by the fourth operand.

If the values not match, adds the word data of the register specified by the second operand to the word data of the register specified by the third operand. And that result is stored in the register specified by the fourth operand.

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Syntax "adfcnd reg1, reg2, reg3"

It compares the current flag condition with the flag condition indicated by the string in the cnd"part.

If the values match, adds the word data of the register specified by the first operand to the word data of the register specified by the second operand. And 1 is added to the addition result and that result is stored in the register specified by the third operand.

If the values not match, adds the word data of the register specified by the first operand to the word data of the register specified by the second operand. And that result is stored in the register specified by the third operand.

[Description]

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For the adf instruction, the assembler generates one adf machine instruction.

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For the adfcnd instruction, the assembler generates the corresponding adf instruction (see "Table 5.28 adfcnd Instruction List") and converts it to syntax "adf imm4, reg1, reg2, reg3".

Table 5.28

adfcnd Instruction List

Instruction

Flag Condition

Meaning of Flag Condition

Instruction Conversion

 
adfgt

((S xor OV) or Z) = 0

Greater than (signed)

 
adf 0xF
 
adfge

(S xor OV) = 0

Greater than or equal (signed)

 
adf 0xE
 
adflt

(S xor OV) = 1

Less than (signed)

 
adf 0x6
 
adfle

( (S xor OV) or Z) = 1

Less than or equal (signed)

 
adf 0x7
 
adfh

(CY or Z) = 0

Higher (Greater than)

 
adf 0xB
 
adfnl

CY = 0

Not lower (Greater than or equal)

 
adf 0x9
 
adfl

CY = 1

Lower (Less than)

 
adf 0x1
 
adfnh

(CY or Z) = 1

Not higher (Less than or equal)

 
adf 0x3
 
adfe

Z = 1

Equal

 
adf 0x2
 
adfne

Z = 0

Not equal

 
adf 0xA
 
adfv

OV = 1

Overflow

 
adf 0x0
 
adfnv

OV = 0

No overflow

 
adf 0x8
 
adfn

S = 1

Negative

 
adf 0x4
 
adfp

S = 0

Positive

 
adf 0xC
 
adfc

CY = 1

Carry

 
adf 0x1
 
adfnc

CY = 0

No carry

 
adf 0x9
 
adfz

Z = 1

Zero

 
adf 0x2
 
adfnz

Z = 0

Not zero

 
adf 0xA
 
adft

always 1

Always 1

 
adf 0x5

 

[Flag]

CY

1 if there is carry from MSB (Most Significant Bit), 0 if not

OV

1 if overflow occurred, 0 if not

S

1 if the result is negative, 0 if not

Z

1 if the result is 0, 0 if not

SAT

---

[Caution]

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If an absolute expression having a value exceeding 4 bits is specified as imm4 of the adf instruction, the following message is output, and assembly continues using the lower 4 bits of the specified value.

W0550011 : illegal operand (range error in immediate).

 

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If 0xD is specified as imm4 of the adf instruction, the following message is output, and assembly is stopped.

E0550261 : illegal condition code.

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