Sets the flag condition after a logical left shift.
The following can be specified for imm4:
Compares the flag condition indicated by the value of the lower 4 bits of the absolute expression specified by the first operand with the current flag condition. If a match is found, the contents of the register specified by the second operand are shifted logically 1 bit to the left and ORed with 1, and the result stored in the register specified by the second operand; otherwise, the contents of the register specified by the second operand are logically shifted 1 bit to the left and the result stored in the register specified by the second operand.
Compares the flag condition indicated by string cnd with the current flag condition. If a match is found, the contents of the register specified by the second operand are shifted logically 1 bit to the left and ORed with 1, and the result stored in the register specified by the second operand; otherwise, the contents of the register specified by the second operand are shifted logically 1 bit to the left and the result stored in the register specified by the second operand.
If the instruction is executed in syntax "sasf imm4, reg", the assembler generates one sasf machine instruction. |
If the instruction is executed in syntax "sasfcnd reg", the assembler generates the corresponding sasf instruction (see "Table 5.32 sasfcnd Instruction List") and expands it to syntax "sasf imm4, reg". |
If an absolute expression having a value exceeding 4 bits is specified as imm4 of the sasf instruction, the assembler outputs the following message and continues assembling using four low-order bits of a specified value. |