divh | CS+ V4.01.00

divh

Divides half-word.

[Syntax]

-	divh reg1, reg2

-	divh imm, reg2

-	divh reg1, reg2, reg3

-	divh imm, reg2, reg3

The following can be specified for imm:

-	Absolute expression having a value of up to 16 bitsNote

-	Relative expression

Note	The assembler does not check whether the value of the expression exceeds 16 bits. The generated machine instruction performs execution using the lower 16 bits.

[Function]

-	Syntax "divh reg1, reg2"

Divides the register value specified by the second operand by the value of the lower halfword data of the register specified by the first operand as a signed value, and stores the quotient in the register specified by the second operand.

-	Syntax "divh imm, reg2"

-	Syntax "divh reg1, reg2, reg3"

Divides the register value specified by the second operand by the value of the lower halfword data of the register specified by the first operand as a signed value and stores the quotient in the register specified by the second operand, and the remainder in the register specified by the third operand. If the same register is specified by the second and third operands, the remainder is stored in that register.

-	Syntax "divh imm, reg2, reg3"

Divides the register value specified by the second operand by the value of the lower halfword data of the absolute or relative expression specified by the first operand as a signed value and stores the quotient in the register specified by the second operand, and the remainder in the register specified by the third operand. If the same register is specified by the second and third operands, the remainder is stored in that register.

[Description]

-	If the instruction is executed in syntaxes "divh reg1, reg2" and "divh reg1, reg2, reg3", the assembler generates one divh machine instruction.

-	If the instruction is executed in syntax "divh imm, reg2", and the following expression is specified for imm, the assembler executes instruction expansion to generate multiple machine instructionsNote.

(a)	Absolute expression having a value of other than 0 within the range of -16 to +15

divh    imm5, reg

mov     imm5, r1

divh    r1, reg

(b)	Absolute expression exceeding the range of -16 to +15, but within the range of -32,768 to +32,767

divh    imm16, reg

movea   imm16, r0, r1

divh    r1, reg

(c)	Absolute expression having a value exceeding the range of -32,768 to +32,767

If all the lower 16 bits of the value of imm are 0

divh    imm, reg

movhi   HIGHW(imm), r0, r1

divh    r1, reg

Else

divh    imm, reg

mov     imm, r1

divh    r1, reg

(d)	Relative expression having !label or %label, or that having $label for a label having a definition in the sdata/sbss-attribute section

divh    !label, reg

movea   !label, r0, r1

divh    r1, reg

divh    %label, reg

movea   %label, r0, r1

divh    r1, reg

divh    $label, reg

movea   $label, r0, r1

divh    r1, reg

(e)	Relative expression having #label or label, or that having $label for a label having no definition in the sdata/sbss-attribute section

divh    #label, reg

mov     #label, r1

divh    r1, reg

divh    label, reg

mov     label, r1

divh    r1, reg

divh    $label, reg

mov     $label, r1

divh    r1, reg

Note	The divh machine instruction does not take an immediate value as an operand.

-	If the instruction is executed in syntax "divh imm, reg2, reg3", and the following expression is specified for imm, the assembler executes instruction expansion to generate one or more machine instructions.

(a)

divh    0, reg2, reg3

divh    r0, reg2, reg3

(b)	Absolute expression having a value of other than 0 within the range of -16 to +15

divh    imm5, reg2, reg3

mov     imm5, r1

divh    r1, reg2, reg3

(c)	Absolute expression exceeding the range of -16 to +15, but within the range of -32,768 to +32,767

divh    imm16, reg2, reg3

movea   imm16, r0, r1

divh    r1, reg2, reg3

(d)	Absolute expression having a value exceeding the range of -32,768 to +32,767

If all the lower 16 bits of the value of imm are 0

divh    imm, reg2, reg3

movhi   HIGHW(imm), r0, r1

divh    r1, reg2, reg3

Else

divh    imm, reg2, reg3

mov     imm, r1

divh    r1, reg2, reg3

(e)	Relative expression having !label or %label, or that having $label for a label having a definition in the sdata/sbss-attribute section

divh    !label, reg2, reg3

movea   !label, r0, r1

divh    r1, reg2, reg3

divh    %label, reg2, reg3

movea   %label, r0, r1

divh    r1, reg2, reg3

divh    $label, reg2, reg3

movea   $label, r0, r1

divh    r1, reg2, reg3

(f)	Relative expression having #label or label, or that having $label for a label having no definition in the sdata/sbss-attribute section

divh    #label, reg2, reg3

mov     #label, r1

divh    r1, reg2, reg3

divh    label, reg2, reg3

mov     label, r1

divh    r1, reg2, reg3

divh    $label, reg2, reg3

mov     $label, r1

divh    r1, reg2, reg3

[Flag]

CY	---
OV	1 if Integer-Overflow occurs, 0 if not
S	1 if the result is negative, 0 if not
Z	1 if the result is 0, 0 if not
SAT	---

[Caution]

-	If r0 is specified by the first operand or the second operand in syntax "divh reg1, reg2", the assembler outputs either of the following message and stops assembling.

E0550239 : Illegal operand (cannot use r0 as source in RH850 mode).

E0550240 : Illegal operand (cannot use r0 as destination in RH850 mode).

-	If r0 is specified by the second operand (reg2) in syntax "divh imm, reg2", the assembler outputs the message and stops assembling.

E0550240 : Illegal operand (cannot use r0 as destination in RH850 mode).

-	If 0 is specified by the first operand (imm) in syntax "divh imm, reg2", the assembler outputs the message and stops assembling.

E0550239 : Illegal operand (cannot use r0 as source in RH850 mode).