This instruction converts the single-precision floating-point number stored in src into an unsigned longword (32-bit) integer and places the result in dest. |
You can assemble assembly-language code that includes this instruction if you have specified the assembler option -isa with selection of the instruction set of the RXv2 or a later version. |
* For the RX Family assembler manufactured by Renesas Electronics Corp., enter a scaled value (the actual value multiplied by 4) as the displacement value (dsp:8, dsp:16). With dsp:8, values from 0 to 1020 (255 × 4) can be specified; with dsp:16, values from 0 to 262140 (65535 × 4) can be specified. The value divided by 4 will be stored in the instruction code. |
Z : The flag is set if the result of the operation is 0; otherwise it is cleared.
S : The flag is set if bit 31 of the result of the operation is 1; otherwise it is cleared.
CV : The flag is set if an invalid operation exception is generated; otherwise it is cleared.
CO : The value of the flag is 0.
CZ : The value of the flag is 0.
CU : The value of the flag is 0.
CX : The flag is set if an inexact exception is generated; otherwise it is cleared.
CE : The flag is set if an unimplemented processing is generated; otherwise it is cleared.
FV : The flag is set if an invalid operation exception is generated, and otherwise left unchanged.
FX : The flag is set if an inexact exception is generated, and otherwise left unchanged.
The FX and FV flags do not change if any of the exception enable bits EX and EV is 1. The S and Z flags do not change when an exception is generated. |