ROUND | CS+ V7.00.00

ROUND	Conversion from floating-point to integer	ROUND
	ROUND floating-point to integer

[Syntax]

ROUND src, dest

[Operation]

dest = ( signed long ) src;

[Function]

-	This instruction converts the single-precision floating-point number stored in src into a signed longword (32-bit) integer and places the result in dest. The result is rounded according to the setting of the RM[1:0] bits in the FPSW.

[Instruction Format]

Syntax	Processng Size	Operand		Code Size (Byte)
Syntax	Processng Size	src	dest	Code Size (Byte)
ROUND src, dest	L	Rs	Rd	3
	L	[Rs].L	Rd	3
	L	dsp:8[Rs].L*	Rd	4
	L	dsp:16[Rs].L*	Rd	4

Note

* For the RX Family assembler manufactured by Renesas Electronics Corp., enter a scaled value (the actual value multiplied by 4) as the displacement value (dsp:8, dsp:16). With dsp:8, values from 0 to 1020 (255 × 4) can be specified; with dsp:16, values from 0 to 262140 (65535 × 4) can be specified. The value divided by 4 will be stored in the instruction code.

[Flag Change]

Flag

Change

–

Conditions

Z : The flag is set if the result of the operation is 0; otherwise it is cleared.

S : The flag is set if the sign bit (bit 31) of the result of the operation is 1; otherwise it is cleared.

CV : The flag is set if an invalid operation exception is generated; otherwise it is cleared.

CO : The value of the flag is always 0.

CZ : The value of the flag is always 0.

CU : The value of the flag is always 0.

CX : The flag is set if an inexact exception is generated; otherwise it is cleared.

CE : The flag is set if an unimplemented processing exception is generated; otherwise it is cleared..

FV : The flag is set if an invalid operation exception is generated; otherwise it does not change.

FX : The flag is set if an inexact exception is generated; otherwise it does not change.

Note	The FX and FV flags do not change if any of the exception enable bits EX and EV is 1. The S and Z flags do not change when an exception is generated.

[Description Example]

ROUND R1, R2

ROUND [R1], R2