RACL | CS+ V7.00.00

RACL	Round the accumulator longword [V2.01.00 or later]	RACL
	Round ACcumulator Longword

[Syntax]

RACL src, Adest

[Operation]

signed 72bit tmp;

signed 73bit tmp73;

tmp = (signed 72bit) Adest << src;

tmp73 = (signed 73bit) tmp + 0000000000080000000h;

if (tmp73 > (signed 73bit) 0007FFFFFFF00000000h)

Adest = 007FFFFFFF00000000h;

else if (tmp73 < (signed 73bit) 1FF8000000000000000h)

Adest = FF8000000000000000h;

else

Adest = tmp & FFFFFFFFFF00000000h;

[Function]

-	This instruction rounds the value of the accumulator into a longword and stores the result in the accumulator.

-	The RACL instruction is executed according to the following procedures.

Processing 1:

The value of the accumulator is shifted to the left by one or two bits as specified by src.

Processing 2:

The value of the accumulator changes according to the value of 64 bits after the contents have been shifted to the left by one or two bits.

-	You can assemble assembly-language code that includes this instruction if you have specified the assembler option -isa with selection of the instruction set of the RXv2 or a later version.

[Instruction Format]

Syntax

Operand

Code Size

(Byte)

src

Adest

RACL src, Adest

#IMM:1*

(IMM:1 = 1, 2)

A0, A1

Note	* For the RX Family assembler manufactured by Renesas Electronics Corp., enter 1 or 2 as the immediate value (IMM:1). The value minus 1 will be stored in the instruction code.

[Flag Change]

This instruction does not affect the states of flags.

[Description Example]

RACL #1, A1

RACL #2, A0