RDACL | CS+ V7.00.00

RDACL	Round the accumulator longword [V2.01.00 or later]	RDACL
	Round Down ACcumulator Longword

[Syntax]

RDACL src, Adest

[Operation]

signed 72bit tmp;

tmp = (signed 72bit) Adest << src;

if (tmp > (signed 72bit) 007FFFFFFF00000000h)

Adest = 007FFFFFFF00000000h;

else if (tmp < (signed 72bit) FF8000000000000000h)

Adest = FF8000000000000000h;

else

Adest = tmp & FFFFFFFFFF00000000h;

[Function]

-	This instruction rounds the value of the accumulator into a longword and stores the result in the accumulator.

-	The RDACL instruction is executed according to the following procedures.

Processing 1:

The value of the accumulator is shifted to the left by one or two bits as specified by src.

Processing 2:

The value of the accumulator changes according to the value of 64 bits after the contents have been shifted to the left by one or two bits.

-	You can assemble assembly-language code that includes this instruction if you have specified the assembler option -isa with selection of the instruction set of the RXv2 or a later version.

[Instruction Format]

Syntax

Operand

Code Size

(Byte)

src

Adest

RDACL src, Adest

#IMM:1

(IMM:1 = 1, 2)

A0, A1

Note	Specify A0 (ACC0) or A1 (ACC1) as Adest.

[Flag Change]

This instruction does not affect the states of flags.

[Description Example]

RDACL #1, A1

RDACL #2, A0