MACHI

Multiply-Accumulate the high-order word

MACHI

Multiply-ACcumulate HIgh-order word


[Syntax]

(1)

MACHI src, src2

(2)

MACHI src, src2, Adest [V2.01.00 or later]

 

[Operation]

(1)

signed short tmp1, tmp2;

signed long long tmp3;

tmp1 = (signed short) (src >> 16);

tmp2 = (signed short) (src2 >> 16);

tmp3 = (signed long) tmp1 * (signed long) tmp2;

ACC = ACC + (tmp3 << 16);

 

(2)

signed short tmp1, tmp2;

signed 72bit tmp3;

tmp1 = (signed short) (src >> 16);

tmp2 = (signed short) (src2 >> 16);

tmp3 = (signed long) tmp1 * (signed long) tmp2;

Adest = Adest + (tmp3 << 16); [V2.01.00 or later]

 

[Function]

(1)

This instruction multiplies the higher-order 16 bits of src by the higher-order 16 bits of src2, and adds the result to the value in the accumulator (ACC). The addition is performed with the least significant bit of the result of multiplication corresponding to bit 16 of ACC. The result of addition is stored in ACC. The higher-order 16 bits of src and the higher-order 16 bits of src2 are treated as signed integers.

(2)

This instruction multiplies the higher-order 16 bits of src by the higher-order 16 bits of src2, and adds the result to the value in the accumulator (ACC0 or ACC1). The addition is performed with the least significant bit of the result of multiplication corresponding to bit 16 of ACC. The result of addition is stored in ACC. The higher-order 16 bits of src and the higher-order 16 bits of src2 are treated as signed integers. You can assemble assembly-language code that includes this instruction if you have specified the assembler option -isa with selection of the instruction set of the RXv2 or a later version. [V2.01.00 or later]

 

[Instruction Format]

Syntax

Operand

Code Size

(Byte)

src

src2

Adest

(1) MACHI src, src2

Rs

Rs2

3

(2) MACHI src, src2, Adest

[V2.01.00 or later]

Rs

Rs2

A0, A1

3

Note

Specify A0 (ACC0) or A1 (ACC1) as Adest.

 

[Flag Change]

-

This instruction does not affect the states of flags.

 

[Description Example]

MACHI R1, R2

MACHI R1, R2, A1